1. Field of the Invention
This invention relates to compound semiconductor device procesing and, in particular, to compound semiconductor device processing involving a semi-insulating wafer.
2. Art Background
Most compound semiconductor electronic device fabrication is accomplished by using a semi-insulating wafer as a starting, mechanically stable body. For example, in the fabrication of gallium arsenide integrated circuits (IC) the various device layers necessary to produce the IC are either built upon and/or implanted in a semi-insulating gallium arsenide substrate and then the processed wafer is cleaved or cut into a plurality of devices. The semi-insulating wafers are produced by introducing deep level traps. For example, indium phosphide is made semi-insulating by doping with either iron or titanium and gallium arsenide is made semi-insulating either by doping with chromium or by a suitable adjustment of the stoichiometry.
Since the processing of a wafer into a plurality of devices is an expensive procedure, substantial cost is avoided by ensuring that the semi-insulating wafer is of an acceptable material before costs are incurred in subsequent processing. For example, to produce suitable devices, a semi-insulating wafer should have uniform electrical properties and, in particular, resistivity uniformity. An electrical property is generally sufficiently uniform for most devices if it varies across the surface of a wafer, e.g., a 2 inch wafer no more than a factor of 2 preferably no more than 10 percent. Poorer uniformity leads to excessive variation of device characteristics over a wafer. If the resistivity is less than 10.sup.6 ohm-cm then devices formed in this low resistivity area typically exhibit excessive leakage current.
Presently, the electrical properties of a wafer are checked by depositing electrodes on the wafer, applying a field to effect the desired measurement, and subsequently removing the electrodes. The application of the electrodes, however, for many semiconductor materials such as gallium arsenide often unacceptably diminishes device production speed. The deposition of electrodes also increases the possibility of surface contamination. Additionally, the accuracy of this measurement in determining crystal quality is somewhat suspect. For example, the interface between the electrode and the wafer introduces measured resistivity not actually present in the wafer.
An optical absorption measurement which does not require electrode deposition has also been made to determine the concentration of deep level traps present in the water. (See, P. Dobrilla and J. S. Blakemore, Applied Physics Letters, 48, 1303 (1986).) The measured trap level is then correlated with resistivity. This correlation from optical to electrical properties is, nevertheless, approximate at best. Thus, a reliable, non-intrusive method for testing the resistivity of semi-insulating wafers has not been reported.